Components / Gates
OR Logic Gate in Logisim
Outputs 1 when at least one active input is 1 (Y = A + B); outputs 0 only when all active inputs are 0.
| Library | Gates |
|---|---|
| Type name | OR Gate |
| Pins and defaults | in0..inN (-50, ±10), out0 (0, 0), width 1..32, inputs 2..8 |
How the OR Works in Logisim
The OR Gate implements logical disjunction (Y = A + B). Its output is High (1) whenever one or more of its active inputs are High (1), and Low (0) only when every active input is Low (0).
In 4-state logic, 1 is the controlling value for an OR gate: if any input bit is 1, that output bit is 1 even if another input on the gate is E. Unconnected pins (Z) are ignored when at least one input is driven; if every input pin is left floating (Z), the output is E.
In Sum-of-Products (SOP) synthesis and full adders, an OR gate combines the outputs of multiple AND product terms into the final output function.
Tip: Never tie two gate outputs directly together to perform an OR—doing so causes a red E short circuit when one is 0 and the other is 1. Always combine them through an OR Gate.
OR Pins & Pinout
| Pin | Direction | Width | Location & Role |
|---|---|---|---|
| in0 .. in(N-1) | Input (Left edge) | 1–32 bits | Located at x = -50 (default in0 at y = -10, in1 at y = +10). Configurable from 2 to 8 inputs. |
| out0 (out) | Output (Right tip) | 1–32 bits | Located at (0, 0). Outputs bitwise OR of active inputs. |
OR Truth Table & Behavior
| A | B | Y = A + B |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 1 |
| 1 | E | 1 (1 is controlling) |