Components / Gates
Odd Parity Gate in Logisim
IEEE rectangular parity box (labeled 2k+1) that outputs 1 when an odd number of active inputs are High (1).
| Library | Gates |
|---|---|
| Type name | Odd Parity |
| Pins and defaults | in0..inN (-50, ±10), out0 (0, 0), width 1..32, inputs 3 (2..8) |
How the Odd Parity Works in Logisim
The Odd Parity gate (drawn as a square IEEE symbol labeled 2k+1 with 3 inputs by default) counts how many of its active inputs are High (1) and outputs 1 when that count is odd (1, 3, 5, or 7).
Mathematically, Odd Parity is identical to a multi-input XOR tree (in0 ⊕ in1 ⊕ in2 ...). It is widely used in serial communication and memory error-checking circuits to generate or verify parity bits.
Tip: Attach an Odd Parity gate across data bits to generate an even-parity check bit (if the data already has an odd number of 1s, the parity bit becomes 1 so the total count of 1s transmitted is even).
Odd Parity Pins & Pinout
| Pin | Direction | Width | Location & Role |
|---|---|---|---|
| in0 .. in(N-1) | Input (Left edge) | 1–32 bits | Located at x = -50 (default 3 inputs at y = -10, 0, +10). Configurable from 2 to 8 inputs. |
| out0 (out) | Output (Right edge) | 1–32 bits | Located at (0, 0). Outputs 1 when an odd number of active inputs are 1. |
Odd Parity Truth Table & Behavior
| in0 | in1 | in2 | Number of 1s | Output (out0) |
|---|---|---|---|---|
| 0 | 0 | 0 | 0 (even) | 0 |
| 0 | 0 | 1 | 1 (odd) | 1 |
| 0 | 1 | 1 | 2 (even) | 0 |
| 1 | 1 | 1 | 3 (odd) | 1 |